An Efficient Fault-Tolerant VLSI Architecture Using Parallel Evolvable Hardware Technology

Evangelos F. Stefatos, Tughrul Arslan. An Efficient Fault-Tolerant VLSI Architecture Using Parallel Evolvable Hardware Technology. In 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA. pages 97-103, IEEE Computer Society, 2004. [doi]

@inproceedings{StefatosA04,
  title = {An Efficient Fault-Tolerant VLSI Architecture Using Parallel Evolvable Hardware Technology},
  author = {Evangelos F. Stefatos and Tughrul Arslan},
  year = {2004},
  doi = {10.1109/EH.2004.1310816},
  url = {http://doi.ieeecomputersociety.org/10.1109/EH.2004.1310816},
  tags = {architecture},
  researchr = {https://researchr.org/publication/StefatosA04},
  cites = {0},
  citedby = {0},
  pages = {97-103},
  booktitle = {6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2145-2},
}