The following publications are possibly variants of this publication:
- Navabi Zainalabedin, Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, & Verification (second ed.), McGraw Hill, New York (2006) ISBN 0-07-144564-1 Hardcover, pp 384, plus XVIMile K. Stojcev. mr, 48(1):167-168, 2008. [doi]
- Cory L. Clark, LabVIEW Digital Signal Processing and Digital Communications , McGraw Hill, New York (2005) ISBN 0-07-144492-0 205 pp, Hardcover, plus XIIIMile K. Stojcev. mr, 48(3):490-491, 2008. [doi]
- Douglas L. Perry, Harry D. Foster, Applied Formal Verification. Hardcover, pp 237, Plus XIV. New York: McGraw Hill; 2005, ISBN 0-07-144372-XMile K. Stojcev. mr, 48(1):169-170, 2008. [doi]