DG2VHDL: A Tool to Facilitate the High Level Synthesis of Parallel Processing Array Architectures

Andrew Stone, Elias S. Manolakos. DG2VHDL: A Tool to Facilitate the High Level Synthesis of Parallel Processing Array Architectures. VLSI Signal Processing, 24(1):99-120, 2000. [doi]

@article{StoneM00:0,
  title = {DG2VHDL: A Tool to Facilitate the High Level Synthesis of Parallel Processing Array Architectures},
  author = {Andrew Stone and Elias S. Manolakos},
  year = {2000},
  doi = {10.1023/A:1008122812813},
  url = {http://dx.doi.org/10.1023/A:1008122812813},
  tags = {architecture},
  researchr = {https://researchr.org/publication/StoneM00%3A0},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {24},
  number = {1},
  pages = {99-120},
}