27.5 A 4GS/s time-interleaved RF ADC in 65nm CMOS with 4GHz input bandwidth

Matt Straayer, Jim Bales, Dwight Birdsall, Denis C. Daly, Phillip Elliott, Bill Foley, Roy Mason, Vikas Singh, Xuejin Wang. 27.5 A 4GS/s time-interleaved RF ADC in 65nm CMOS with 4GHz input bandwidth. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 464-465, IEEE, 2016. [doi]

Authors

Matt Straayer

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Jim Bales

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Dwight Birdsall

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Denis C. Daly

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Phillip Elliott

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Bill Foley

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Roy Mason

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Vikas Singh

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Xuejin Wang

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