S. Subha. An Algorithm for Parallel Execution of Loops in Chip Multiprocessor Caches. In ARTCom 2009, International Conference on Advances in Recent Technologies in Communication and Computing, Kottayam, Kerala, India, 27-28 October 2009. pages 85-89, IEEE Computer Society, 2009. [doi]
@inproceedings{Subha09, title = {An Algorithm for Parallel Execution of Loops in Chip Multiprocessor Caches}, author = {S. Subha}, year = {2009}, doi = {10.1109/ARTCom.2009.60}, url = {http://doi.ieeecomputersociety.org/10.1109/ARTCom.2009.60}, tags = {caching}, researchr = {https://researchr.org/publication/Subha09}, cites = {0}, citedby = {0}, pages = {85-89}, booktitle = {ARTCom 2009, International Conference on Advances in Recent Technologies in Communication and Computing, Kottayam, Kerala, India, 27-28 October 2009}, publisher = {IEEE Computer Society}, isbn = {978-0-7695-3845-7}, }