Paged Absolute Addressing Mode Optimizations for Embedded Digital Signal Processors Using Post-pass Data-flow Analysis

Ashok Sudarsanam, Sharad Malik, Steven W. K. Tjiang, Stan Y. Liao. Paged Absolute Addressing Mode Optimizations for Embedded Digital Signal Processors Using Post-pass Data-flow Analysis. Design Autom. for Emb. Sys., 4(1):41-59, 1999. [doi]

@article{SudarsanamMTL99,
  title = {Paged Absolute Addressing Mode Optimizations for Embedded Digital Signal Processors Using Post-pass Data-flow Analysis},
  author = {Ashok Sudarsanam and Sharad Malik and Steven W. K. Tjiang and Stan Y. Liao},
  year = {1999},
  doi = {10.1023/A:1008810300304},
  url = {http://dx.doi.org/10.1023/A:1008810300304},
  researchr = {https://researchr.org/publication/SudarsanamMTL99},
  cites = {0},
  citedby = {0},
  journal = {Design Autom. for Emb. Sys.},
  volume = {4},
  number = {1},
  pages = {41-59},
}