Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2

Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough. Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2. IEEE Micro, 24(5):70-78, 2004. [doi]

@article{SuhLB04a,
  title = {Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2},
  author = {Taeweon Suh and Hsien-Hsin S. Lee and Douglas M. Blough},
  year = {2004},
  doi = {10.1109/MM.2004.50},
  url = {http://doi.ieeecomputersociety.org/10.1109/MM.2004.50},
  tags = {caching, protocol},
  researchr = {https://researchr.org/publication/SuhLB04a},
  cites = {0},
  citedby = {0},
  journal = {IEEE Micro},
  volume = {24},
  number = {5},
  pages = {70-78},
}