High throughput VLSI architecture for soft-output mimo detection based on a greedy graph algorithm

Yang Sun, Joseph R. Cavallaro. High throughput VLSI architecture for soft-output mimo detection based on a greedy graph algorithm. In Fabrizio Lombardi, Sanjukta Bhanja, Yehia Massoud, R. Iris Bahar, editors, Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009. pages 445-450, ACM, 2009. [doi]

Authors

Yang Sun

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Joseph R. Cavallaro

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