Accelerating HMMer on FPGAs using systolic array based architecture

Yanteng Sun, Peng Li, Guochang Gu, Yuan Wen, Yuan Liu, Dong Liu. Accelerating HMMer on FPGAs using systolic array based architecture. In 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009. pages 1-8, IEEE, 2009. [doi]

@inproceedings{SunLGWLL09-0,
  title = {Accelerating HMMer on FPGAs using systolic array based architecture},
  author = {Yanteng Sun and Peng Li and Guochang Gu and Yuan Wen and Yuan Liu and Dong Liu},
  year = {2009},
  doi = {10.1109/IPDPS.2009.5160927},
  url = {http://dx.doi.org/10.1109/IPDPS.2009.5160927},
  tags = {rule-based, architecture},
  researchr = {https://researchr.org/publication/SunLGWLL09-0},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009},
  publisher = {IEEE},
}