Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations

G. Surendra, Subhasis Banerjee, S. K. Nandy. Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations. J. Embedded Computing, 2(1):15-34, 2006. [doi]

@article{SurendraBN06,
  title = {Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations},
  author = {G. Surendra and Subhasis Banerjee and S. K. Nandy},
  year = {2006},
  url = {http://iospress.metapress.com/content/3bcmbqed8jta590g/},
  tags = {optimization, reuse},
  researchr = {https://researchr.org/publication/SurendraBN06},
  cites = {0},
  citedby = {0},
  journal = {J. Embedded Computing},
  volume = {2},
  number = {1},
  pages = {15-34},
}