A novel implementation of combined systolic and folded architectures for adaptive filters in FPGA

Gomathi Swaminathan, G. Murugesan 0001, S. Sasikala, L. Murali. A novel implementation of combined systolic and folded architectures for adaptive filters in FPGA. Microprocessors and Microsystems, 74:103018, 2020. [doi]

@article{SwaminathanMSM20,
  title = {A novel implementation of combined systolic and folded architectures for adaptive filters in FPGA},
  author = {Gomathi Swaminathan and G. Murugesan 0001 and S. Sasikala and L. Murali},
  year = {2020},
  doi = {10.1016/j.micpro.2020.103018},
  url = {https://doi.org/10.1016/j.micpro.2020.103018},
  researchr = {https://researchr.org/publication/SwaminathanMSM20},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {74},
  pages = {103018},
}