Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices

Kea-Tiong Tang, Wei-Chen Wei, Zuo-Wei Yeh, Tzu-Hsiang Hsu, Yen-Cheng Chiu, Cheng-Xin Xue, Yu-Chun Kuo, Tai-Hsing Wen, Mon-Shu Ho, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Meng-Fan Chang. Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices. In 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019. pages 166, IEEE, 2019. [doi]

@inproceedings{TangWYHCXKWHLLH19,
  title = {Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices},
  author = {Kea-Tiong Tang and Wei-Chen Wei and Zuo-Wei Yeh and Tzu-Hsiang Hsu and Yen-Cheng Chiu and Cheng-Xin Xue and Yu-Chun Kuo and Tai-Hsing Wen and Mon-Shu Ho and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Meng-Fan Chang},
  year = {2019},
  doi = {10.23919/VLSIC.2019.8778074},
  url = {https://doi.org/10.23919/VLSIC.2019.8778074},
  researchr = {https://researchr.org/publication/TangWYHCXKWHLLH19},
  cites = {0},
  citedby = {0},
  pages = {166},
  booktitle = {2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019},
  publisher = {IEEE},
  isbn = {978-4-86348-720-8},
}