A mesochronous pipeline scheme for high performance low power digital systems

Suryanarayana Tatapudi, José G. Delgado-Frias. A mesochronous pipeline scheme for high performance low power digital systems. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

@inproceedings{TatapudiD06,
  title = {A mesochronous pipeline scheme for high performance low power digital systems},
  author = {Suryanarayana Tatapudi and José G. Delgado-Frias},
  year = {2006},
  doi = {10.1109/ISCAS.2006.1692697},
  url = {http://dx.doi.org/10.1109/ISCAS.2006.1692697},
  researchr = {https://researchr.org/publication/TatapudiD06},
  cites = {0},
  citedby = {0},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece},
  publisher = {IEEE},
}