From Iterative Threshold Decoding to a Low-Power High-Speed Analog VLSI Decoder Implementation - researchr publication authors

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Werner G. Teich, Heiko Teich, Giuseppe Oliveri. From Iterative Threshold Decoding to a Low-Power High-Speed Analog VLSI Decoder Implementation. In Ignacio Rojas, Gonzalo Joya, Andreu Català, editors, Advances in Computational Intelligence - 15th International Work-Conference on Artificial Neural Networks, IWANN 2019, Gran Canaria, Spain, June 12-14, 2019, Proceedings, Part II. Volume 11507 of Lecture Notes in Computer Science, pages 615-628, Springer, 2019. [doi]

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