A hybrid memristor-CMOS multiplier design based on memristive universal logic gates

Mehri Teimoory, Amirali Amirsoleimani, Arash Ahmadi, Majid Ahmadi. A hybrid memristor-CMOS multiplier design based on memristive universal logic gates. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 1422-1425, IEEE, 2017. [doi]

@inproceedings{TeimooryAAA17,
  title = {A hybrid memristor-CMOS multiplier design based on memristive universal logic gates},
  author = {Mehri Teimoory and Amirali Amirsoleimani and Arash Ahmadi and Majid Ahmadi},
  year = {2017},
  doi = {10.1109/MWSCAS.2017.8053199},
  url = {https://doi.org/10.1109/MWSCAS.2017.8053199},
  researchr = {https://researchr.org/publication/TeimooryAAA17},
  cites = {0},
  citedby = {0},
  pages = {1422-1425},
  booktitle = {IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-6389-5},
}