A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant Circuits

Erica Tena-Sanchez, Javier Castro-Ramirez, Antonio J. Acosta. A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant Circuits. IEEE J. Emerg. Sel. Topics Circuits Syst., 4(2):203-215, 2014. [doi]

@article{Tena-SanchezCA14,
  title = {A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant Circuits},
  author = {Erica Tena-Sanchez and Javier Castro-Ramirez and Antonio J. Acosta},
  year = {2014},
  doi = {10.1109/JETCAS.2014.2315878},
  url = {http://doi.ieeecomputersociety.org/10.1109/JETCAS.2014.2315878},
  researchr = {https://researchr.org/publication/Tena-SanchezCA14},
  cites = {0},
  citedby = {0},
  journal = {IEEE J. Emerg. Sel. Topics Circuits Syst.},
  volume = {4},
  number = {2},
  pages = {203-215},
}