Design And Analysis of A VLSI Based High Performance Low Power Parallel Square Architecture

Himanshu Thapliyal, M. B. Srinivas, Hamid R. Arabnia. Design And Analysis of A VLSI Based High Performance Low Power Parallel Square Architecture. In Hamid R. Arabnia, Iyad A. Ajwa, editors, Proceedings of the 2005 International Conference on Algorithmic Mathematics and Computer Science, AMCS 2005, Las Vegas, Nevada, USA. pages 72-76, CSREA Press, 2005.

Authors

Himanshu Thapliyal

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M. B. Srinivas

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Hamid R. Arabnia

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