A 51.4 Mb/s FSK transmitter employing a Phase Domain Digital Synthesizer with 1.5 µs start-up for energy efficient duty cycling

Raghavasimhan Thirunarayanan, David Ruffieux, Nicola Scolari, Christian C. Enz. A 51.4 Mb/s FSK transmitter employing a Phase Domain Digital Synthesizer with 1.5 µs start-up for energy efficient duty cycling. In nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016. pages 129-132, IEEE, 2016. [doi]

@inproceedings{ThirunarayananR16,
  title = {A 51.4 Mb/s FSK transmitter employing a Phase Domain Digital Synthesizer with 1.5 µs start-up for energy efficient duty cycling},
  author = {Raghavasimhan Thirunarayanan and David Ruffieux and Nicola Scolari and Christian C. Enz},
  year = {2016},
  doi = {10.1109/ESSCIRC.2016.7598259},
  url = {http://dx.doi.org/10.1109/ESSCIRC.2016.7598259},
  researchr = {https://researchr.org/publication/ThirunarayananR16},
  cites = {0},
  citedby = {0},
  pages = {129-132},
  booktitle = {nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-2972-3},
}