Joseph Thomas. Pipelined systolic architectures for DLMS adaptive filtering. VLSI Signal Processing, 12(3):223-246, 1996. [doi]
@article{Thomas96:8,
title = {Pipelined systolic architectures for DLMS adaptive filtering},
author = {Joseph Thomas},
year = {1996},
doi = {10.1007/BF00924987},
url = {http://dx.doi.org/10.1007/BF00924987},
tags = {architecture},
researchr = {https://researchr.org/publication/Thomas96%3A8},
cites = {0},
citedby = {0},
journal = {VLSI Signal Processing},
volume = {12},
number = {3},
pages = {223-246},
}