IndiRA: Design and Implementation of a Pipelined RISC-V Processor

Ankita Tiwari, Prithwijit Guha, Gaurav Trivedi, Nitesh Gupta, Navneeth Jayaraj, Jan Pidanic. IndiRA: Design and Implementation of a Pipelined RISC-V Processor. In 33rd International Conference Radioelektronika, RADIOELEKTRONIKA 2023, Pardubice, Czech Republic, April 19-20, 2023. pages 1-6, IEEE, 2023. [doi]

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