Efficient Latency Guarantees for Mixed-Criticality Networks-on-Chip

Sebastian Tobuschat, Rolf Ernst. Efficient Latency Guarantees for Mixed-Criticality Networks-on-Chip. In Gabriel Parmer, editor, 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2017, Pittsburg, PA, USA, April 18-21, 2017. pages 113-122, IEEE, 2017. [doi]

@inproceedings{TobuschatE17-0,
  title = {Efficient Latency Guarantees for Mixed-Criticality Networks-on-Chip},
  author = {Sebastian Tobuschat and Rolf Ernst},
  year = {2017},
  doi = {10.1109/RTAS.2017.31},
  url = {https://doi.org/10.1109/RTAS.2017.31},
  researchr = {https://researchr.org/publication/TobuschatE17-0},
  cites = {0},
  citedby = {0},
  pages = {113-122},
  booktitle = {2017 IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2017, Pittsburg, PA, USA, April 18-21, 2017},
  editor = {Gabriel Parmer},
  publisher = {IEEE},
  isbn = {978-1-5090-5269-1},
}