Evaluation of EMVA Using the Instruction-Level Parallelism on Tegra X1

Hirobumi Tominaga, Asuka Nakamura, Yoshitaka Maekawa. Evaluation of EMVA Using the Instruction-Level Parallelism on Tegra X1. In Sixth International Symposium on Computing and Networking, CANDAR Workshops 2018, Takayama, Japan, November 27-30, 2018. pages 239-242, IEEE, 2018. [doi]

Authors

Hirobumi Tominaga

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Asuka Nakamura

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Yoshitaka Maekawa

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