Hsinyu Tsai, Pritish Narayanan, Shubham Jain, Stefano Ambrogio, Kohji Hosokawa, Masatoshi Ishii, Charles Mackin, Ching-Tzu Chen, Atsuya Okazaki, Akiyo Nomura, Irem Boybat, Ramachandran Muralidhar, Martin M. Frank, Takeo Yasuda, Alexander M. Friz, Yasuteru Kohda, An Chen, Andrea Fasoli, Malte J. Rasch, Stanislaw Wozniak, Jose Luquin, Vijay Narayanan, Geoffrey W. Burr. Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited). In IEEE International Symposium on Circuits and Systems, ISCAS 2023, Monterey, CA, USA, May 21-25, 2023. pages 1-5, IEEE, 2023. [doi]
@inproceedings{TsaiNJAHIMCONBM23,
title = {Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited)},
author = {Hsinyu Tsai and Pritish Narayanan and Shubham Jain and Stefano Ambrogio and Kohji Hosokawa and Masatoshi Ishii and Charles Mackin and Ching-Tzu Chen and Atsuya Okazaki and Akiyo Nomura and Irem Boybat and Ramachandran Muralidhar and Martin M. Frank and Takeo Yasuda and Alexander M. Friz and Yasuteru Kohda and An Chen and Andrea Fasoli and Malte J. Rasch and Stanislaw Wozniak and Jose Luquin and Vijay Narayanan and Geoffrey W. Burr},
year = {2023},
doi = {10.1109/ISCAS46773.2023.10181650},
url = {https://doi.org/10.1109/ISCAS46773.2023.10181650},
researchr = {https://researchr.org/publication/TsaiNJAHIMCONBM23},
cites = {0},
citedby = {0},
pages = {1-5},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2023, Monterey, CA, USA, May 21-25, 2023},
publisher = {IEEE},
isbn = {978-1-6654-5109-3},
}