Kimiyoshi Usami, Toshiaki Shirai, Tasunori Hashida, Hiroki Masuda, Seidai Takeda, Mitsutaka Nakata, Naomi Seki, Hideharu Amano, Mitaro Namiki, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura. Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression. In VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009. pages 381-386, IEEE, 2009. [doi]
@inproceedings{UsamiSHMTNSANIKN09,
title = {Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression},
author = {Kimiyoshi Usami and Toshiaki Shirai and Tasunori Hashida and Hiroki Masuda and Seidai Takeda and Mitsutaka Nakata and Naomi Seki and Hideharu Amano and Mitaro Namiki and Masashi Imai and Masaaki Kondo and Hiroshi Nakamura},
year = {2009},
doi = {10.1109/VLSI.Design.2009.63},
url = {http://dx.doi.org/10.1109/VLSI.Design.2009.63},
tags = {design},
researchr = {https://researchr.org/publication/UsamiSHMTNSANIKN09},
cites = {0},
citedby = {0},
pages = {381-386},
booktitle = {VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009},
publisher = {IEEE},
isbn = {978-0-7695-3506-7},
}