An optimized buffer insertion algorithm with delay-power constraints for VLSI layouts

Chessda Uttraphan, Nasir Shaikh-Husin, Mohamed Khalil Hani. An optimized buffer insertion algorithm with delay-power constraints for VLSI layouts. Turkish J. Electr. Eng. Comput. Sci., 25:844-861, 2017. [doi]

@article{UttraphanSH17,
  title = {An optimized buffer insertion algorithm with delay-power constraints for VLSI layouts},
  author = {Chessda Uttraphan and Nasir Shaikh-Husin and Mohamed Khalil Hani},
  year = {2017},
  doi = {10.3906/elk-1411-129},
  url = {https://doi.org/10.3906/elk-1411-129},
  researchr = {https://researchr.org/publication/UttraphanSH17},
  cites = {0},
  citedby = {0},
  journal = {Turkish J. Electr. Eng. Comput. Sci.},
  volume = {25},
  pages = {844-861},
}