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A high-performance area-aware DSP processor architecture for video codecs

Lan-Da Van, Hsin-Fu Luo, Chien-Ming Wu, Wen-Hsiang Hu, Chun-Ming Huang, Wei-Chang Tsai. A high-performance area-aware DSP processor architecture for video codecs. In Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, ICME 2004, 27-30 June 2004, Taipei, Taiwan. pages 1499-1502, IEEE, 2004.

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