Survey of Techniques for Efficient Solving of Boolean Formulas from Formal Verification of Pipelined, Superscalar, and VLIW Microprocessors at a High Level of Abstraction

Miroslav N. Velev. Survey of Techniques for Efficient Solving of Boolean Formulas from Formal Verification of Pipelined, Superscalar, and VLIW Microprocessors at a High Level of Abstraction. In International Symposium on Artificial Intelligence and Mathematics, ISAIM 2018, Fort Lauderdale, Florida, USA, January 3-5, 2018. 2018. [doi]

@inproceedings{Velev18,
  title = {Survey of Techniques for Efficient Solving of Boolean Formulas from Formal Verification of Pipelined, Superscalar, and VLIW Microprocessors at a High Level of Abstraction},
  author = {Miroslav N. Velev},
  year = {2018},
  url = {http://isaim2018.cs.virginia.edu/papers/ISAIM2018_SAT_Velev.pdf},
  researchr = {https://researchr.org/publication/Velev18},
  cites = {0},
  citedby = {0},
  booktitle = {International Symposium on Artificial Intelligence and Mathematics, ISAIM 2018, Fort Lauderdale, Florida, USA, January 3-5, 2018},
}