Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation

Miroslav N. Velev, Randal E. Bryant. Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation. In 1st International Conference on Application of Concurrency to System Design (ACSD 98), 23-26 March 1998, Fukushima, Japan. pages 200-212, IEEE Computer Society, 1998. [doi]

@inproceedings{VelevB98,
  title = {Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation},
  author = {Miroslav N. Velev and Randal E. Bryant},
  year = {1998},
  url = {http://csdl.computer.org/comp/proceedings/csd/1998/8350/00/83500200abs.htm},
  tags = {e-science},
  researchr = {https://researchr.org/publication/VelevB98},
  cites = {0},
  citedby = {0},
  pages = {200-212},
  booktitle = {1st International Conference on Application of Concurrency to System Design (ACSD  98), 23-26 March 1998, Fukushima, Japan},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-8350-3},
}