Application of ASIP in Embedded Design with Optimized Clock Management

Mood Venkanna, Rameshwar Rao, P. Chandra Sekhar. Application of ASIP in Embedded Design with Optimized Clock Management. In Ajay Jaiswal, Vijender Kumar Solanki, Zhongyu (Joan) Lu, Nikhil Rajput, editors, Proceedings of the First International Conference on Information Technology and Knowledge Management, New Delhi, India, December 22-23, 2017. Volume 14 of Annals of Computer Science and Information Systems, pages 159-163, 2017. [doi]

@inproceedings{VenkannaRS17,
  title = {Application of ASIP in Embedded Design with Optimized Clock Management},
  author = {Mood Venkanna and Rameshwar Rao and P. Chandra Sekhar},
  year = {2017},
  doi = {10.15439/2017KM41},
  url = {https://doi.org/10.15439/2017KM41},
  researchr = {https://researchr.org/publication/VenkannaRS17},
  cites = {0},
  citedby = {0},
  pages = {159-163},
  booktitle = {Proceedings of the First International Conference on Information Technology and Knowledge Management, New Delhi, India, December 22-23, 2017},
  editor = {Ajay Jaiswal and Vijender Kumar Solanki and Zhongyu (Joan) Lu and Nikhil Rajput},
  volume = {14},
  series = {Annals of Computer Science and Information Systems},
  isbn = {978-83-949419-0-1},
}