A Jitter Reduction Circuit Using Autocorrelation for Phase-Locked Loops and Serializer-Deserializer (SERDES) Circuits

Hari Vijay Venkatanarayanan, Michael L. Bushnell. A Jitter Reduction Circuit Using Autocorrelation for Phase-Locked Loops and Serializer-Deserializer (SERDES) Circuits. In 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India. pages 581-588, IEEE Computer Society, 2008. [doi]

@inproceedings{VenkatanarayananB08,
  title = {A Jitter Reduction Circuit Using Autocorrelation for Phase-Locked Loops and Serializer-Deserializer (SERDES) Circuits},
  author = {Hari Vijay Venkatanarayanan and Michael L. Bushnell},
  year = {2008},
  doi = {10.1109/VLSI.2008.118},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.118},
  researchr = {https://researchr.org/publication/VenkatanarayananB08},
  cites = {0},
  citedby = {0},
  pages = {581-588},
  booktitle = {21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India},
  publisher = {IEEE Computer Society},
}