Improving performance of NEM relay logic circuits using integrated charge-boosting flip flop

Ramakrishnan Venkatasubramanian, Sujan K. Manohar, Poras T. Balsara. Improving performance of NEM relay logic circuits using integrated charge-boosting flip flop. In Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2011, San Diego, CA, USA, June 8-9, 2011. pages 37-44, IEEE Computer Society, 2011. [doi]

@inproceedings{Venkatasubramanian11,
  title = {Improving performance of NEM relay logic circuits using integrated charge-boosting flip flop},
  author = {Ramakrishnan Venkatasubramanian and Sujan K. Manohar and Poras T. Balsara},
  year = {2011},
  url = {http://dl.acm.org/citation.cfm?id=2052104},
  researchr = {https://researchr.org/publication/Venkatasubramanian11},
  cites = {0},
  citedby = {0},
  pages = {37-44},
  booktitle = {Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2011, San Diego, CA, USA, June 8-9, 2011},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4577-0993-7},
}