An analog processor architecture for a neural network classifier

Michel Verleysen, Philippe Thissen, Jean-Luc Voz, Jordi Madrenas. An analog processor architecture for a neural network classifier. IEEE Micro, 14(3):16-28, 1994. [doi]

@article{VerleysenTVM94,
  title = {An analog processor architecture for a neural network classifier},
  author = {Michel Verleysen and Philippe Thissen and Jean-Luc Voz and Jordi Madrenas},
  year = {1994},
  doi = {10.1109/40.285221},
  url = {http://doi.ieeecomputersociety.org/10.1109/40.285221},
  researchr = {https://researchr.org/publication/VerleysenTVM94},
  cites = {0},
  citedby = {0},
  journal = {IEEE Micro},
  volume = {14},
  number = {3},
  pages = {16-28},
}