Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling

Rafáel Vieira, Fábio Passos, Ricardo Povoa, Ricardo Martins 0003, Nuno Horta, Jorge Guilherme, Nuno Lourenço 0003. Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. In 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2022, Villasimius, Italy, June 12-15, 2022. pages 1-4, IEEE, 2022. [doi]

@inproceedings{VieiraPP0HG022,
  title = {Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling},
  author = {Rafáel Vieira and Fábio Passos and Ricardo Povoa and Ricardo Martins 0003 and Nuno Horta and Jorge Guilherme and Nuno Lourenço 0003},
  year = {2022},
  doi = {10.1109/SMACD55068.2022.9816253},
  url = {https://doi.org/10.1109/SMACD55068.2022.9816253},
  researchr = {https://researchr.org/publication/VieiraPP0HG022},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2022, Villasimius, Italy, June 12-15, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-6703-2},
}