Verifying Chips Design at RTL Level

Wu Wang, Nan Zhang 0001, Cong Tian, Zhenhua Duan, Zhijie Xu, Chaofeng Yu. Verifying Chips Design at RTL Level. In Cristina David, Meng Sun 0002, editors, Theoretical Aspects of Software Engineering - 17th International Symposium, TASE 2023, Bristol, UK, July 4-6, 2023, Proceedings. Volume 13931 of Lecture Notes in Computer Science, pages 146-163, Springer, 2023. [doi]

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