Exploiting Pipelining to Tolerate Wire Delays in a Programmable-Reconfigurable Processor

Chi-Wei Wang, Nicholas P. Carter, Richard B. Kujoth, Jeffrey J. Cook, Derek B. Gottlieb. Exploiting Pipelining to Tolerate Wire Delays in a Programmable-Reconfigurable Processor. In Tero Rissa, Steven J. E. Wilton, Philip Heng Wai Leong, editors, Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005. pages 57-64, IEEE, 2005.

@inproceedings{WangCKCG05,
  title = {Exploiting Pipelining to Tolerate Wire Delays in a Programmable-Reconfigurable Processor},
  author = {Chi-Wei Wang and Nicholas P. Carter and Richard B. Kujoth and Jeffrey J. Cook and Derek B. Gottlieb},
  year = {2005},
  researchr = {https://researchr.org/publication/WangCKCG05},
  cites = {0},
  citedby = {0},
  pages = {57-64},
  booktitle = {Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
  editor = {Tero Rissa and Steven J. E. Wilton and Philip Heng Wai Leong},
  publisher = {IEEE},
  isbn = {0-7803-9362-7},
}