AN ultra low power fault tolerant SRAM design in 90nm CMOS

Kuande Wang, Li Chen, Jinsheng Yang. AN ultra low power fault tolerant SRAM design in 90nm CMOS. In Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, CCECE 2009, 3-6 May 2009, Delta St. John s Hotel and Conference Centre, St. John s, Newfoundland, Canada. pages 1076-1079, IEEE, 2009. [doi]

Authors

Kuande Wang

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Li Chen

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Jinsheng Yang

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