Li Wang, Matthew French, Azadeh Davoodi, Deepak Agarwal. FPGA Dynamic Power Minimization through Placement and Routing Constraints. EURASIP J. Emb. Sys., 2006, 2006. [doi]
@article{WangFDA06,
title = {FPGA Dynamic Power Minimization through Placement and Routing Constraints},
author = {Li Wang and Matthew French and Azadeh Davoodi and Deepak Agarwal},
year = {2006},
doi = {10.1155/ES/2006/31605},
url = {http://dx.doi.org/10.1155/ES/2006/31605},
tags = {constraints, routing},
researchr = {https://researchr.org/publication/WangFDA06},
cites = {0},
citedby = {0},
journal = {EURASIP J. Emb. Sys.},
volume = {2006},
}