Efficient FPGA implementation of qr decomposition using a systolic array architecture - researchr publication authors

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Xiaojun Wang, Miriam Leeser. Efficient FPGA implementation of qr decomposition using a systolic array architecture. In Mike Hutton, Paul Chow, editors, Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008. pages 260, ACM, 2008. [doi]

This author has not been identified. Look up 'Xiaojun Wang' in GoogleThis author has not been identified. Look up 'Miriam Leeser' in Google

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