An Area-Efficient Design of Variable-Length Fast Fourier Transform Processor

Shuenn-Shyang Wang, Chien-Sung Li. An Area-Efficient Design of Variable-Length Fast Fourier Transform Processor. VLSI Signal Processing, 51(3):245-256, 2008. [doi]

@article{WangL08:3,
  title = {An Area-Efficient Design of Variable-Length Fast Fourier Transform Processor},
  author = {Shuenn-Shyang Wang and Chien-Sung Li},
  year = {2008},
  doi = {10.1007/s11265-007-0063-8},
  url = {http://dx.doi.org/10.1007/s11265-007-0063-8},
  tags = {design},
  researchr = {https://researchr.org/publication/WangL08%3A3},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {51},
  number = {3},
  pages = {245-256},
}