The following publications are possibly variants of this publication:
- A Multi-Chain Merged Tapped Delay Line for High Precision Time-to-Digital Converters in FPGAsYonggang Wang, Qiang Cao, Chong Liu. tcas, 65-II(1):96-100, 2018. [doi]
- An FPGA-Integrated Time-to-Digital Converter Based on a Ring Oscillator for Programmable Delay Line Resolution MeasurementChao Chen, Shengwei Meng, Zhenghuan Xia, Guangyou Fang, Hejun Yin. jece, 2014, 2014. [doi]