A hierarchical N-Queen decimation lattice and hardware architecture for motion estimation

Chung-Neng Wang, Shin-Wei Yang, Chi-Min Liu, Ti-Hao Chiang. A hierarchical N-Queen decimation lattice and hardware architecture for motion estimation. IEEE Trans. Circuits Syst. Video Techn., 14(4):429-440, 2004. [doi]

Authors

Chung-Neng Wang

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Shin-Wei Yang

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Chi-Min Liu

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Ti-Hao Chiang

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