Jianfei Wang, Chen Yang 0005, Fahong Zhang, Jia Hou, Yishuo Meng, Siwei Xiang, Yang Su. A High-Throughput and Scalable Schoolbook Polynomial Multiplier for Accelerating Saber on FPGA Using a Novel Winograd-Based Architecture. IEEE Trans. Circuits Syst. II Express Briefs, 71(4):2344-2348, April 2024. [doi]
@article{WangYZHMXS24,
title = {A High-Throughput and Scalable Schoolbook Polynomial Multiplier for Accelerating Saber on FPGA Using a Novel Winograd-Based Architecture},
author = {Jianfei Wang and Chen Yang 0005 and Fahong Zhang and Jia Hou and Yishuo Meng and Siwei Xiang and Yang Su},
year = {2024},
month = {April},
doi = {10.1109/TCSII.2023.3339566},
url = {https://doi.org/10.1109/TCSII.2023.3339566},
researchr = {https://researchr.org/publication/WangYZHMXS24},
cites = {0},
citedby = {0},
journal = {IEEE Trans. Circuits Syst. II Express Briefs},
volume = {71},
number = {4},
pages = {2344-2348},
}