Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool

Haroon Waris, Weiqiang Liu, Pengfei Huang, Ruizhe Ma, Chenghua Wang, Fabrizio Lombardi. Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool. In 23rd IEEE International Conference on Digital Signal Processing, DSP 2018, Shanghai, China, November 19-21, 2018. pages 1-5, IEEE, 2018. [doi]

@inproceedings{WarisLHMWL18,
  title = {Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool},
  author = {Haroon Waris and Weiqiang Liu and Pengfei Huang and Ruizhe Ma and Chenghua Wang and Fabrizio Lombardi},
  year = {2018},
  doi = {10.1109/ICDSP.2018.8631872},
  url = {https://doi.org/10.1109/ICDSP.2018.8631872},
  researchr = {https://researchr.org/publication/WarisLHMWL18},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {23rd IEEE International Conference on Digital Signal Processing, DSP 2018, Shanghai, China, November 19-21, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-6811-5},
}