A low-power 1GHz razor FIR accelerator with time-borrow tracking pipeline and approximate error correction in 65nm CMOS

Paul N. Whatmough, Shidhartha Das, David M. Bull. A low-power 1GHz razor FIR accelerator with time-borrow tracking pipeline and approximate error correction in 65nm CMOS. In 2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013. pages 428-429, IEEE, 2013. [doi]

@inproceedings{WhatmoughDB13,
  title = {A low-power 1GHz razor FIR accelerator with time-borrow tracking pipeline and approximate error correction in 65nm CMOS},
  author = {Paul N. Whatmough and Shidhartha Das and David M. Bull},
  year = {2013},
  doi = {10.1109/ISSCC.2013.6487800},
  url = {http://dx.doi.org/10.1109/ISSCC.2013.6487800},
  researchr = {https://researchr.org/publication/WhatmoughDB13},
  cites = {0},
  citedby = {0},
  pages = {428-429},
  booktitle = {2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-4515-6},
}