Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna. Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU. In 35th IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2023, Porto Alegre, Brazil, October 17-20, 2023. pages 23-33, IEEE, 2023. [doi]
@inproceedings{WijeratneKP23,
title = {Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU},
author = {Sasindu Wijeratne and Rajgopal Kannan and Viktor K. Prasanna},
year = {2023},
doi = {10.1109/SBAC-PAD59825.2023.00012},
url = {https://doi.org/10.1109/SBAC-PAD59825.2023.00012},
researchr = {https://researchr.org/publication/WijeratneKP23},
cites = {0},
citedby = {0},
pages = {23-33},
booktitle = {35th IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2023, Porto Alegre, Brazil, October 17-20, 2023},
publisher = {IEEE},
isbn = {979-8-3503-0548-7},
}