Low-power CMOS PLL for clock generator

Wen-Chi Wu, Chih-Chien Huang, Chih-Hsiung Chang, Nai-Heng Tseng. Low-power CMOS PLL for clock generator. In ISCAS (3). pages 633-636, 2003. [doi]

@inproceedings{WuHCT03:0,
  title = {Low-power CMOS PLL for clock generator},
  author = {Wen-Chi Wu and Chih-Chien Huang and Chih-Hsiung Chang and Nai-Heng Tseng},
  year = {2003},
  doi = {10.1109/ISCAS.2003.1205643},
  url = {http://dx.doi.org/10.1109/ISCAS.2003.1205643},
  researchr = {https://researchr.org/publication/WuHCT03%3A0},
  cites = {0},
  citedby = {0},
  pages = {633-636},
  booktitle = {ISCAS (3)},
}