Y. C. Xiang, P. Huang, Z. Zhou, R. Z. Han, Y. N. Jiang, Q. M. Shu, Z. Q. Su, Y. B. Liu, X. Y. Liu, J. F. Kang. Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation. In IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019. pages 1-4, IEEE, 2019. [doi]
@inproceedings{XiangHZHJSSLLK19,
title = {Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation},
author = {Y. C. Xiang and P. Huang and Z. Zhou and R. Z. Han and Y. N. Jiang and Q. M. Shu and Z. Q. Su and Y. B. Liu and X. Y. Liu and J. F. Kang},
year = {2019},
doi = {10.1109/ISCAS.2019.8702401},
url = {https://doi.org/10.1109/ISCAS.2019.8702401},
researchr = {https://researchr.org/publication/XiangHZHJSSLLK19},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019},
publisher = {IEEE},
isbn = {978-1-7281-0397-6},
}