Enabling coordinated register allocation and thread-level parallelism optimization for GPUs

Xiaolong Xie, Yun Liang, Xiuhong Li, Yudong Wu, Guangyu Sun, Tao Wang, Dongrui Fan. Enabling coordinated register allocation and thread-level parallelism optimization for GPUs. In Milos Prvulovic, editor, Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015. pages 395-406, ACM, 2015. [doi]

@inproceedings{XieLLWSWF15,
  title = {Enabling coordinated register allocation and thread-level parallelism optimization for GPUs},
  author = {Xiaolong Xie and Yun Liang and Xiuhong Li and Yudong Wu and Guangyu Sun and Tao Wang and Dongrui Fan},
  year = {2015},
  doi = {10.1145/2830772.2830813},
  url = {http://doi.acm.org/10.1145/2830772.2830813},
  researchr = {https://researchr.org/publication/XieLLWSWF15},
  cites = {0},
  citedby = {0},
  pages = {395-406},
  booktitle = {Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015},
  editor = {Milos Prvulovic},
  publisher = {ACM},
  isbn = {978-1-4503-4034-2},
}