Optimal number and placement of Through Silicon Vias in 3D Network-on-Chip - researchr publication authors

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Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen. Optimal number and placement of Through Silicon Vias in 3D Network-on-Chip. In Rolf Kraemer, Adam Pawlak, Andreas Steininger, Mario Schölzel, Jaan Raik, Heinrich Theodor Vierhaus, editors, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2011, Cottbus, Germany, April 13-15, 2011. pages 105-110, IEEE, 2011. [doi]

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