Impact of Write Pulse and Process Variation on 22 nm FinFET-Based STT-RAM Design: A Device-Architecture Co-Optimization Approach - researchr publication authors

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Cong Xu, Yang Zheng, Dimin Niu, Xiaochun Zhu, Seung H. Kang, Yuan Xie 0001. Impact of Write Pulse and Process Variation on 22 nm FinFET-Based STT-RAM Design: A Device-Architecture Co-Optimization Approach. IEEE Trans. Multi-Scale Computing Systems, 1(4):195-206, 2015. [doi]

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